1. Field of the Invention
The present invention pertains to a method of smoothing a trench sidewall after a deep trench silicon etch process. In particular, the present invention pertains to a post-etch treatment method for smoothing a scalloped sidewall surface present after a deep trench silicon etch process.
2. Brief Description of the Background Art
Deep trench silicon etching is one of the principal technologies currently being used to fabricate microstructure devices, and is an enabling technology for many microelectromechanical systems (MEMS) applications. Deep trench etching of silicon is traditionally accomplished using one of two methods. The first of these methods is wet KOH etching, which has many limitations. One significant limitation of wet KOH etching is that the etch taper is fixed by the crystalline lattice structure of the substrate which, in the case of single-crystal silicon, produces a taper angle of 54.7°, because the etch occurs along the [100] crystal planes. This lack of profile variability means that devices have to be designed to wet KOH etch limitations. When fabricating trenches having a taper angle greater than 54.7°, KOH etching is limited to silicon wafers having a [111] crystal orientation. This can cause compatibility problems with processing steps that may work only on [100] oriented silicon wafers. Another issue with KOH wet etching is that it requires the use of a hard mask, such as an oxide or nitride mask, which increases the fabrication costs. Further, in terms of process integration, since wet etching cannot be performed in a vacuum, and most semiconductor processing chambers are designed to operate under vacuum, wet etches are generally avoided in semiconductor production lines. If MEMS are to become mainstream production products, process integration of MEMS may also dictate the avoidance of wet etch processes. The use of wet etch processes, such as KOH etching, is also limited to situations where the creation of residue particles and process chamber contamination issues are not as important, such as in a research environment, where product yield is not essential.
In contrast to wet etching, dry etching has many advantages in production processes. For example, dry etching allows for better stoichiometric control of the etch environment because the gases flow continuously, causing the concentration of gases in the chamber to be more constant over time. Further, dry etching processes are typically performed in a vacuum, which tends to remove particulate etch byproducts from the process chamber, leading to decreased particulate contamination of the substrate wafer.
Currently, the most commonly used single-crystal silicon deep trench etch process is based upon a cyclic plasma etch/polymer deposition method. The process enables the removal of at least one micron (1 μm) of silicon per etch cycle. During the etch portion of the etch/deposition process, the principal etchant is often SF6, which may be used in combination with a diluent so that the SF6 concentration in the etchant plasma source gas is at least about 75% by volume. During the polymer deposition portion of the process, a plasma generated from polymer-forming gases such as CHF3 is introduced to the chamber to produce polymer coatings on the trench sidewall. The polymer coating helps prevent lateral etching of the trench sidewall during a vertical etch portion of a subsequent cycle. Typical process conditions for performing a presently known etch/deposition method are as follows: 500 W-3000 W plasma source power; 0-100 W substrate bias power; 5 mTorr-300 mTorr process chamber pressure; and 40° C.-120° C. substrate temperature.
FIGS. 1A-1E illustrate the steps in a presently known etch/deposition process for forming a deep trench in silicon. FIG. 1A shows a typical starting structure 100 for performing the etch/deposition process. Structure 100 comprises a patterned photoresist layer 104 overlying a bare silicon wafer 102. FIG. 1B shows structure 100 after performance of a relatively anisotropic SF6 etch for initial trench 106 formation. FIG. 1C shows structure 100 after the performance of a first polymer deposition step. A thick layer 108 of polymer has been deposited on the bottom and sidewalls of trench 106. FIG. 1D shows the structure 100 after the start of the second SF6 etch cycle. The bottom 110 of trench 106 has been cleared of polymer. FIG. 1E shows structure 100 after the completion of the second SF6 etch step. The width w2 of the lower trench 112 is smaller than the width w1 of the upper trench 106, due to the smaller effective mask size which results from the continued presence of polymer 108 on the sidewalls of upper trench 106. A typical deep trench (trench having a depth of about 40 μm) sidewall formed using this method has an angle θ of about 88° to about 89° from a horizontal line drawn at the bottom of the trench.
While the etch/deposition cycle process described above and shown in FIGS. 1A-1E has many advantages over wet etching, the cycling of gases in the etch/deposition process introduces a unique type of sidewall roughness known as scalloping. FIG. 2 shows an open area 204 etched in a silicon substrate 202 to form a silicon trench sidewall 206 exhibiting 0.8 micron deep (d) scallops 208. Scalloping occurs because the SF6 etch is relatively isotropic. Because of the discontinuous etch and deposition steps in a silicon etch/polymer deposition process, the etch profile of a single etch step is not flat, but rather it is concave with respect to etched open area 204. Every etch/deposition cycle leaves a concave scallop 208 on the trench sidewall. This shape is then repeated for each successive etch step, resulting in a sidewall with a wavy, scalloped profile. Scalloping is particularly a problem when the etched trench is to be used as a mold in a subsequent process and when the silicon trench surface is to be used in an optical component.
It would therefore be useful to provide a method which could be used to reduce or substantially eliminate scalloping from a silicon trench sidewall after a deep trench etch process.